CCD camera's

Out-of-use camera's:
I designed and built my first CCD-camera in 1994 based on a Texas Instrument, full-frame CCD, the TC211, with 195x165 pixels of 13.8x16um (sensitive area: 2.6x2.6mm). Only a limited number of TC211-photographs remain from this initial period. In 1996 I got hold of a Philips FT800P frame-transfer chip with a sensitive area of 6.4x4.8mm and 734x580 pixels (HxV). The chip was used in a non-interlaced mode and horizontal binning, resulting in 367x290 pixels of 17.0x16.8um. These camera's are out of use.

Currently used camera's:
In 1999 I received an FTF1020-C colour CCD chip from Philips Nat-lab and early 2002, after discussing with them the set-backs of a colour chip for astrophotography, Philips surprised me by sending an FTT1010-M and FTF2020-M monochromatic chip. (Shortly thereafter this CCD-line was transferred to Dalsa. ) Running out of possibilities and connections to obtain single CCD- (or CMOS-) chips, I'm still using these two CCD's, up to this date!

The FT-line of chips uses standard 1kx1k buiding blocks to manufacture CCDs with different sizes and aspect ratios but with functionaly identical shift registers and output circuitry. Pixels measure 12x12um. The FTT-type is a frame transfer model with a light schielded storage section that can operate without shutter; the FTF-type is a full-frame version.

Images below are of the recently (2022) upgraded FTF2020-M camera, featuring a 2-stage Peltier stack for improved cooling and lower dark current.
FTF2020M-camera
Schematic drawing
Housing
Assembly 1
Assembly 2
Window heater

The basic design, construction and electronics of the camera's holding these CCD's are similar to the TC211 and FT800P camera's:
  • For cooling, the CCD-chip is attached to a thermo-electric element (peltier element) via an aluminum block ('cold finger') that on one side is shaped to fit the CCD and on the other side to fit the peltier element.
  • The peltier element (or stack) is mounted on a big heatsink which forms the mechanical backbone of the camera, and is cooled by forced air using an attached fan.
  • The CCD-chip with supply&driver board, cold-finger and peltier element (or stack) are contained in a closed cylindrical housing with a multi-coated photographic UV-filter that acts as a high transmission window.
  • The space surrounding the CCD, cold finger and peltier element is stuffed with closed-cell foam for thermal isolation.
  • The analog and digital electronics is contained in a separate cabinet attached to the 'backbone' (i.e. the heat sink).
  • Drivers for the vertical shift registers (A and B gates) and the horizontal register (C gate) are in the vicinity of the CCD-chip. With these gates the charge that has accumulated during exposure is shifted line-by-line (A, B) and pixel-by-pixel (C) to the on-chip charge-to-voltage converter.
  • This output voltage is buffered using an external emitter follower to create a low-ohmic line and protect the sensitive output of the CCD.
Camera electronics:
Digital part:
The electronics board of the camera mainly comprises digital circuits with the following functions (IO's):
  • CLEAR: Drive all gates low to drain accumulated charge and clear the CCD.
  • READ (as opposed to INTEGRATE):
    • FRAME TRANSFER high: Shift the accumulated charge to the shielded storage area (3 milliseconds) and start clocking out charge to the output. For the FTT1010-M the shielding is on-chip.
    • FRAME TRANSFER low, Full Frame mode: Start clocking out charge to the output (pixel clock: 333kHz).
  • BINNING: On-chip binning (i.e. adding) of 2(H)x2(V) pixels. This increases sensitivity by a factor 4 at the cost of resolution. The image resolution reduces in both dimensions by 2 and the pixel size becomes 24x24um.
  • LEFT_OUT: Select the lower left output of the CCD (otherwise: the lower right).
  • SAMPLE: This output gives the pixel clock and is used to synchronize the AD-conversion process. The conversion cycle is 3usec per pixel.
Analog part:
A small part of the camera-board consists of an analog circuit for processing the video signal. It contains a low noise, AC-coupled AD797 opamp that, using an external switch, provides a gain of 4x, 11x or 32x. The output of the Opamp is connected to a sample-and-hold circuit that uses Correlated Double Sampling: Every pixel-cycle, after charge reset, clamp the output signal to ground before sensing the video signal of that pixel.

The S&H output is fed to the 12-bit (0..4096) analog-to-digital convertor of the 'system controller' .

Find TI, Philips and Dalsa CCD data sheets here!